ALTERA EPCS128SI16N
ALTERA EPCS128SI16N

ALTERA EPCS128SI16N

  • 128Mbit non-volatile configuration storage capacity
  • -40°C to +85°C extended operating temperature range
  • Low-power Quad-SPI interface for fast FPGA configuration
  • 100,000 erase/program cycle endurance
  • Sector protection and in-system programming support
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In radar and electronic warfare systems, reliable FPGA configuration storage is critical for maintaining operational integrity in harsh environments. The ALTERA EPCS128SI16N provides a robust solution for storing configuration data in high-performance aerospace and defense applications, where system uptime and data integrity are non-negotiable.
This industrial-grade configuration memory delivers the balance of capacity, speed, and durability required for modern radar signal processing systems. Its low-power operation helps reduce overall system power consumption, while its extended temperature range ensures performance in challenging field conditions. With support for in-system programming, it enables flexible field updates without requiring physical access to sensitive components.

The Altera EPCS128SI16N is a 128 Mbit serial (single-SPI) configuration flash device in a 16-pin SOIC package — the highest-capacity member of the EPCS family, used for active serial (AS) FPGA configuration of Cyclone II/III/IV and Stratix II/III/IV devices. It stores the FPGA bitstream in non-volatile flash and automatically loads configuration data at power-on, operating at up to 40 MHz clock frequency with 2.7V–3.6V supply. The EPCS128SI16N is now discontinued/obsolete; the recommended current-generation replacement is the EPCQ128ASI16N, which is pin-compatible, higher-speed (Quad-SPI), and in active production.

EPCS Family Capacity Comparison

DeviceCapacityPackageInterfaceStatus
EPCS128SI16N (this)128 Mbit16-SOICSingle-SPI (×1)Obsolete
EPCS64SI16N64 Mbit16-SOICSingle-SPI (×1)Obsolete
EPCS16SI8N16 Mbit8-SOICSingle-SPI (×1)Obsolete
EPCQ128ASI16N128 Mbit16-SOICQuad-SPI (×4/×1)Active

Despite its obsolescence, the EPCS128SI16N remains a high-demand component for MRO, legacy system sustainment, and repair of fielded Cyclone III/IV and Stratix III/IV-based avionics and defense electronics boards where the EPCQ128A has not been qualified as a replacement. Sparkle Milchip maintains inventory with full date code traceability and anti-counterfeit inspection per AS6081 to support sustainment procurement. For new designs, specify the EPCQ128ASI16N. For legacy board repair where the original EPCS128 part number is called out in the approved parts list, the EPCS128SI16N is the correct procurement target.


FAQ

Is the EPCS128SI16N still in production?

No — it is officially obsolete and no longer manufactured by Intel/Altera. Procurement is from distributor stock and authorized excess inventory suppliers. For new designs, specify the pin-compatible EPCQ128ASI16N.

What FPGAs use the EPCS128SI16N?

Primarily Cyclone II, Cyclone III, Cyclone IV E/GX, Stratix II, Stratix III, and Stratix IV GX in active serial (AS) configuration mode. It cannot be used with devices requiring ×4 Quad-SPI configuration.

Can EPCS128SI16N be replaced by EPCQ128ASI16N on an existing board?

Yes — pin-compatible. A new programming file must be generated in Quartus Prime targeting EPCQ128A, and “Disable EPCS ID check” must be enabled for older FPGAs. Verify sector size differences (EPCS128 uses 256 KB sectors) do not affect in-system update firmware before substituting.

What is the maximum clock frequency for AS configuration with EPCS128?

40 MHz maximum serial clock. The FPGA’s AS configuration interface drives the clock and controls the data transfer rate.

What programming interface is available for EPCS128?

Active Serial (AS) interface via FPGA dedicated pins, or JTAG interface via the Serial Flash Loader (SFL) IP core downloaded into the FPGA. Both Quartus Prime and third-party programming tools support EPCS device programming.

How is the unused flash memory after configuration used?

After the bitstream is stored, remaining EPCS flash sectors are accessible as user storage through the EPCS Controller IP core in a Nios II system. Typical uses include boot parameters, calibration tables, and field-updateable lookup data. Sector erase of configuration sectors must be prevented in firmware.

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